AVR Interrupts :: ATMEGA16A

How fast can we switch 2N2222

Transistors can be operated as current controlled switches by operating them in saturation and cutoff regions. Simple enough.. right?

Some interesting question soon start hounding us as we move into the zone of high frequency switching -

• How fast can we switch? 
• Is there a limit? 
• How does the switching behavior degrade when we hit the limit? 
• Can something to done to prevent hitting the limit?
• If we can't prevent, can we delay it atleast?

Enter "Parasitic Capacitance" - the unavoidable evil, which gives meaning to the word "reality". It's not my intention to explain the theory behind the effects of parasitic capacitance in a transistor. Rather, I will jot down some of my findings related to the frequency response of 2N2222 towards switching.

Now, here is the interesting part...

 

Just so that you know, LTSpice does a very precise real life modelling of 2N2222.

555 - astable

In my previous blogs, we saw how 555 can be configured as a bistable (latch) or monostable (single pulse) signal generator. In this blog I would be delving into the astable configuration for 555.

So, what is the astable mode? In the context of 555, astable mode is that mode of operation when the output pin (Pin 3) perpetually oscillates predictably between HIGH and LOW voltages without external interventions. I have highlighted some parts of the definition which needs special mention.

• Predictability is referred to in terms of the value of HIGH and LOW and the time that the output stays in those states.
• External input implies any input to the astable circuitry apart from a DC power source.

Note that a term 'duty cycle' is used frequently in the context of astable outputs. Duty cycle is quite simple - it is equal to the %age of time the signal stays HIGH in one time period. So for example, if we have a time period of 4 seconds and the signal is HIGH for 1 sec (remaining 3 seconds, it's LOW), the duty cycle of the signal is 25%. capeesh?

Now, let's get into the interesting part - how do we go through the process of building one using 555.

Let's pick up from where we left the monostable circuit.

There we needed a negative (<1/3 Vcc) pulse at the trigger (Pin 2) to set the output high. As soon as the pulse starts, the discharge pin stops grounding and the capacitor starts charging. After a certain time (determined by the value of R and C) the capacitor reaches a voltage > 2/3 Vcc. When this happens the output is set to low and pin 7 gets grounded, causing the capacitor to discharge.

To extend the monostable circuit for astable operation, we need the an automated mechanism to trigger Pin 2 and 6, repeatedly at configurable time intervals.

So, how do we do that? We rewire the circuitry as follows:

The part that is of interest to us is the path from Vcc through R1, R2, C and ground. Also note how the 555 pins are connected, 7 is connected between R1 and R2, 6 and 2 are fused and the cap C1 is connected between 2 and ground.

Lets walk through the step sequence for two operation cycles and see how the circuit works. Let's start at an initial state when the circuit is just powered up, ergo, the output (pin 3) is low and C1 is discharged at the start moment.. but not for long...

1. Since C1 is discharged, pin 2 is grounded. This meets the criteria of having a low (<1/3 Vcc) at pin 2 and hence the output goes high. 
2. Once the output goes high, the threshold pin become ungrounded, implying that current now flows through Vcc, R1, R2 and starts charging C1.
3. The charge on the cap is reflected on pin 6 and 2. Output is still high and the charge on C1 is steadily rising.
4. The charge on cap touches 2/3 Vcc and rises... wham, the threshold (Pin 6) is triggered and output goes low, causing 7 to get grounded.
5. Once 7 is grounded there are two separate current flows. First one is from Vcc through R1 and grounded through 7. Second one is the discharge current from the capacitor.
6. Capacitor starts discharging from 2/3 Vcc and starts sliding down. 
7. Soon it tips just below 1/3 Vcc and wham.. pin 2 is triggered. Causing the output to go high. So we are back to step 2 and the cycle continues.

Let's overlay the above on a voltage time graph and a real life oscilloscope. Hope this drives the concept home.. next we will delve into a bit of mathematics to understand and control the precise nature of the output waveform.

The mathematics behind

Few important considerations to keep in perspective before we go forward:

1. The output is high while the capacitor is charging and low when the capacitor is discharging
2. The capacitor charges and discharges only between 2/3 Vcc and 1/3 Vcc

As a recap, for a RC circuit the charging and discharging equations are:

Here R' is the resistor through which the capacitor is charging towards Vcc and t2-t1 is the time that the capacitor takes to charge from 1/3 Vcc to 2/3 Vcc. Now the discharging part...

Here R" is the resistor through which the capacitor is discharging. Now see the image below which shows the path of current flow during the charge and discharge cycles. It can be seen that the capacitor charges through both the resistors (R1+R2) but discharges only through (R2).

Therefore, substituting R1+R2 for R' and R2 for R" in the above equations we realize that the On and Off times are

Taking it a bit further, the time period is t_on + t_off

and hence the duty cycle is t_on / T, i.e

Limitations

There is something of interest hidden in the formulas above.. do you see that the on time is always greater than the off time, due to R1? This implies that the duty cycle obtained from this configuration can never be less than 50%. This might be a serious limitation in cases where we are interested in pulse type of waveforms which have a very small duty cycles.

To remedy the situation, the circuitry can be wired a bit differently as shown below:



See the parts marked in red. All it does it channelize the charge and discharge currents so as to overcome the limitation of >50% duty cycle. See how the change current is constrained to flow thrugh R1, D2, left part of R2; while the discharge current is routed through right part of R2, R3 and D1. I have take a PWM circuit to explain the concept, and hence the R2 pot. You can just place two resistors in series of the diode to make life simple.

Second big limitation is accuracy. 555 progressively looses accuracy for larger time periods (exceeding a few minutes). This is of the large capacitor tolerances. If you are looking at 555 for very low frequency (0.0x Hz) scenarios, it is better to use IC4060, which is a 14 stage binary ripple counter and can give you time periods in hours and days.

Third limitation is fast switching. If you are operating on the other end of spectrum (tens to hundreds of KHz), a slight load on the output will seriously influence the leading edge taper. See the scope snapshot below.

If you need a sharp leading edge irrespective of driving load (at high frequencies), you are better off driving a high impedance op-amp buffer or a switching mosfet at the output.

Lastly another important thing worth mentioning is the difference between TTL and CMOS 555 varieties. CMOS versions (TLC555 or ICM7555 chips) are costlier but give a much better output as compared to TTL 555. CMOS 555 chips can give close to rail voltages at the output and show much less distortion and ringing even when operating under moderate load.



USBASP teething woes

For an AVR newbie, there can be nothing more frustrating than the feeling of being ditched by the usbasp programmer the moment he ventures out on his own.

A newbie usually starts with an usbasp programmer and a development board. After the initial struggle of setting up the drivers for the programmer and configuring Atmel Studio with avrdude, life seems joyful when the first blinking LED program work seamlessly.

In my case, I use the following devices. The red one is the usbasb programmer from USBProg and the other one is the development board (with an onboard ATMEGA 16A PU chip) from provotech.in.

Once the initial familiarization is over, the next logical step is to move to a breadboard and be freed from the constrains of the development board. In doing so, we pick up the standard usbasp 10 pin FRC pinout and map it to the programming pins of ATMEGA 16 - simple, right? BTW - one of the reasons I love 16A to start with is because the pins are wonderfully grouped and are not scattered around. Anyway, this is how the ideal in system programming connections look like.

So, where is the problem? The problem is that the above does not work and avrdude keeps saying that it is not able to communicate with the device.

• First doubt - maybe the connections are goofed up... check.. no they look ok...
• Second hunch - maybe the chip is fried .. check with another chip... oops the second chip doesn't work too....
• Third attempt - let's try with the 16A from the board ... lift the chip, place it on the breadboard... try to flash.. nope.. not working.. 
• Fourth attempt - place the 16A back on the development board.. try with the programmer .. it works.... wow.. 
• Fifth attempt - Search google desperately... read through the longish message board trails.. you see recommendations of upgrading firmware... but you are already on the latest... 

At this point, nothing really makes sense anymore. Desperation, amalgamated with frustration sets in and you make up your mind to close shop. 

The root cause and solution

After tracing the male FRC pins on the usbasp PCB back to the Atmega8 (in accordance with the official usbasp schematics), I found that - the ISP pinout from the usbasp board was non standard and did not match with the standard 10 pin configuration!

In fact, mine looked like the following.. 

Great revelation, now the connections can be rewired and ..... NOOOO.. it still doesn't work. The usbasp programmer is still not able to communicate with the MCU. Darn!! double darn, it was such a good lead!

Upon further sleuthing it comes to notice that the the programmer is operating at 8 MHz oscillator while our virgin chip is operating at a 1Mz factory default. Ergo, we need to slow down the SCK sync by using the Slow SCK jumper (JP3 in the original schematic).. we do that and voila, the virgin chips start working...

Wonderful!

Now, just for the sake of completeness, we try to see if our solution is able to handle the ATMEGA 16A chip on the development board. So we pry it open, put it on the breadboard, connect the jumpers and poof!.. it doesn't work. Some more head scratching and the realization dawns that the chip on the development board is not a virgin! It has been fused to work with an external oscillator - which makes sense since the the Slow SCK jumper is not required when working with the development board and there is a 8 MHz onboard oscillator connected to the XTAL pins on the board). So, we slap in an external 8 MHz oscillator on the bread board, remove the JP3 and wow, it works now!

Hope this helps someone who is running down the rabbit hole, like me and my son did.

Oh, btw - a nifty tip, if you end up getting yourself a usbasp programmer with a non standard pinout, you are better off desoldering the 10 pin make FRC connector and soldering a 6 strand FRC directly. Furthermore, it is a good idea to make yourself a tiny flash fang at the other end with a 6 pin male berg strip and a tiny strip board cutout. It digs its fangs perfectly onto the breadboard when you want to flash something on the chip.

555 - Monostable

Welcome to the fourth blog in the '555 - Demystification' series! In this blog, I will attempt to demystify the monostable operation mode of 555. Why another blog on the subject - you might ask? Well, simply put, I couldn't find any on the subject which could paint a comprehensible picture for my early teen son :)

Back to the topic, then! The problem we are trying to address is as follows - We want to design a circuit using the 555 IC, which once triggered will maintain the high output state (Pin 3) for a pre-defined period of time, before resetting the output pin to low. The diagram below explain the ask pictorially.

So, what's the big deal about it? Well, we built the bi-stable circuit using 555 earlier, but that had a CLR button to bring down (reset) the output state. In this case, the reset is accomplished automatically and precisely after a pre-defined period of time. What makes it interesting is that we will be introducing the intelligence of  'sensing' elapsed time in the circuitry.

Incidentally, this type of behaviour is also called 'Monostable', since it has one stable state (0) and tends to return to the stable state after any trigger - though after a period of time.

Before we start assembling the magical circuitry, let's spend a few moments on the concept of 'sensing' elapsed time in the electronic world. Note that I have been using the word 'elapsed time' instead of just time. Just time is absolute, but elapsed time is relative to a marker - in our case the moment we triggered the output to high.

There are many ways of measuring time - rely on a clock, count pulses etc. However, there is another simple and cheap mechanism which is very common when it comes to time measurement. The charging of a capacitor ! A capacitor charges and discharges very predictably when a voltage is applied across it through a resistor. If you want to know more about how a capacitor charges and discharges read this first. In short, the charge build up across a capacitor in an RC circuit is in accordance with the below (mathematically defined and hence precise) curve.

In the above equation, V is the voltage across the capacitor, Vcc is the source (max) voltage, R & C are the values of Resistor and Capacitor respectively and t is the time required for a voltage V to build up across the capacitor.

Great! So, we can precisely predict what will be the voltage across the capacitor after time t, or conversely how much time will it take for a certain voltage to build up across the capacitor. The practical question is - how do we build a circuit to act on the time or voltage trigger? See the circuit below:

With the above circuit, we have accomplished the following:

1. Set up a mechanism to establish a precise voltage (or time) reference using a voltage divider (R1 and R2). If, R1 = R2 then the voltage reference is 1/2 Vcc etc.
2. Used a voltage comparator to output a high when the capacitor charge exceeds the voltage reference.

In essence, the output of the comparator will go to high after the time required to charge the capacitor to the voltage reference set by the divider.

Let's continue building on it further. Now let's build more circuitry to automatically reset the timer after triggering an output. See the circuit below:

The above circuit consists of the following parts:

1. Green components (R1 & R2) - Voltage divider used to set reference point
2. Blue components (R & C) - RC circuit used to measure time
3. The comparator (OP1)
4. Orange components (R3 and T1) - Reset machinery

So how do they work in unison? 

• OP1 output remains low as long as the capacitor is charging. This causes the transistor T1 to remain off - implying that the voltage at the transitor collector and the comparator +ve pin continues to reflect the voltage across the capacitor. 
• After some time the voltage across the capacitor reaches a value above the one set by the resistors (R1 and R2) and the OP1 output goes high. 
• As soon as OP1 output goes high, it switches on the transistor effectively grounding the collector thus resetting the timing device.

There is one important point to note though. The moment the capacitor is grounded by the transistor, the output of the comparator goes back to 0. This implies that the high output of OP1 is momentary and we will need some more circuitry to make good use of it. But the circuit above is quite helpful in demonstrating the concepts of setting time thresholds, tracking time, triggering on threshold breach and then resetting the timer.

If you are with me so far, the rest of the journey is going to be downhill from here :)

Before I show you how to build the circuit with 555, I will take a moment more to refresh your memory of 555 internals with special attention to Pin 7, the Discharge pin. The above diagram shows how it is positioned. It is worthwhile to remember that when the Output is LOW, the Discharge pin is grounded and consequently when the Output is HIGH, the Discharge pin is not connected to ground.

Easy way to remember - Output Pin LOW - Discharge Pin LOW

The circuit below unveils the 555 monostable operation circuit (finally!) based on the understanding we have built above. Let's start with the interpretation of the timing sequence diagrams to the right. It contains four time markers:

• t0 - The instant of powering up the circuit
• t1 - The instant when the SET switch is pushed
• t2 - The instant when the SET switch is released
• t3 - The time when the output pulse resets itself

It is assumed that the time taken to push the switch is quite less as compared to the pulse width. Don't get hung up on this assumption - we will dissect it later, for now just accept it :)

Let's analyse the behaviour of the circuit in reference to the time markers t0-3.

When the circuit is switched on, Pin 2 (trigger) is pulled to high via R1 and Pin 6 (Threshold), Pin 7 (Discharge) are effectively grounded (because C1 is not charged up yet). This forces the output to LOW. Remember Pin 7 is grounded when the output is low effectively preventing the capacitor from charging through R. This state continues till time t1.

At t1, the SET button is pushed and released quickly, effectively sending a negative pulse to the trigger pin (Pin 2). This causes the output to go high and Pin 7 to decouple from ground. From this point onwards, the capacitor C starts charging through R5 and voltage at Pin 6 starts to build exponentially. Remember that Pin 6 is connected to the first comparator (CMP1) within the 555 IC. The reference voltage for CMP1 is maintained at 2/3 Vcc through the three 5k resistor chain. The capacitor charging will continue till it reaches 2/3 Vcc. The equations below show that it will take 1.1 * R5 * C1 seconds for the capacitor to reach a voltage equal to 2.3 Vcc.

As soon as the voltage across the capacitor reaches 2.3 Vcc, CMP1 triggers a high - effectively resetting the output. Hence 1.1 * R5 * C2 defines the width of the monostable pulse.

Now as soon as the output is reset, Pin 7 gets grounded, immediately pulling the capacitor voltage to 0 - resetting the whole mechanism. The monostable circuitry will remain in this state till it is triggered by switching in on via the push button switch.

I hope this explanation helps appreciate (and not just understand) how a monostable circuit using 555 is constructed and works!

555 - Power on state

Previous blogs in this series:

1. 555 Demystified
2. 555 as a latch

In the last blog, I wrote about how to use the 555 as an one bit latch - the simplest of use cases. Incidentally the resulting circuit is also called bi-stable mode of 555. In this blog, we will build further on it. For ease of reference here is the circuit we built last time.

In the first blog, we learnt that Pin 3 will go high if SET (Pin 2) is pulled low (SET button is pressed) and CLR (Pin 6) is low (CLR button is not pushed). But, what about the t=0 condition in the circuit above? t=0 condition is the initial state of Pin 3, the moment power is turned on.

In the above circuit, assuming both the buttons are open (not pushed) - Pin 6 will be pulled down via R2 and Pin 2 will be pulled up via R1. Now let's refer to the diagram below which shows how the inputs at Pin 6 and 2 influence the output.

With Pin 6 at 0 - CMP1 will output 0 (low), while with Pin 2 at 1 (high) - CMP2 will output 0. So that initial input into the SR flip-flop is 0-0 for S-R respectively. This implies that the output will remain unchanged. Since right before power up, the output was low it will start with a low state when the power is turned on.

All good so far! So, can we be assured that the output will be always low on power-up. :) Unfortunately, not. Relying on the above logic to get a deterministic low output on startup is not a great idea. The most common cause is stray capacitance in the circuitry which feeds to the trigger pin or the stray capacitance of any switches connected to pin 2.

Secondly, what about the case where we want the output to be high on power-up?

The above use cases are called power-up set/reset use cases and we need extra circuitry to cater for them in a deterministic way.

Low output state at startup

There are multiple strategies to force a low output state at startup. The two most common ones are to

• Solution A ) Force the reset pin (Pin 4) to be low at startup, transitioning to high in some finite but small period of time.
• Solution B ) Force the threshold pin (Pin 6) to be high at startup, transitioning to low in some finite but small period of time.

Below are two common strategies to force Pin 4 to a grounded state at power up. In the first strategy, the collector of T1 is grounded as C1 is charging up through R2. In the second strategy, (which works just as good), C2 is effectively shorted at startup and slowly builds up voltage as it charges through R3 - effectively pulling Pin 4 to ground.

Shown below is a simple strategy to pull Pin 6 to high at power up. At the start C2 is effectively shorted, forcing Pin 6 to be high. As time passes, C2 charges up and in the process Pin 6 is pulled down to ground in due course. As Pin 6 starts up high, the output is effectively 0 on power up.

High output state at startup

There are cases where you might want 555 to start up on a high output state at power up. For example, I have a garden irrigation system which operates via a monostable pulse of 555. In this case, I want the 555 to operate my solenoid valve as soon as I power up the circuit and subsequently on a trigger. To achieve this, we simply build on the strategies discussed above - in this case, we keep Pin 2 and 6 pulled down at startup.

I have intentionally left other pins in the diagrams as the strategies discussed above are independent of the configuration of other pins.

Stay tuned for the next instalment in this series, where I will start discussing about the monostable and astable operation modes of the 555 chip.

Simplest of 555 circuits - one bit latch

Earlier instalments in this series:

1. IC 555 Demystified (inside out)

Before we delve into appreciating the full potential of 555, let's start off with the simplest of circuits - A single bit latch. You might be interested in glancing through my previous blog on 555 Demystified to get some bearing on this blog.

Let's start by taking care of the simple pins first. Note that the circuits shown below are intermediate circuits and will not work as is - they are just step by step explanations of how to build the final circuit.

1. Pin 1 - Grounded 
2. Pin 8 - Connected to Vcc
3. Pin 4 - Connected to Vcc - Remember this is the active low reset pin which we tie to Vcc to ensure that it accidentally doesn't cause any resets. More of a safeguard.
4. Pin 5 - Control pin. We don't need to play with the upper comparator threshold and hence we park this pin by connecting it to ground via a 10nF capacitor
5. Pin 7 - Discharge pin. We don't need to leverage the discharge feature and hence we park this pin by connecting it to ground via a 10nF capacitor.

Life become much simpler when we have taken care of 5 out of 8 pins :) Let's tackle the remaining three, starting with Pin 3 - the output pin. See the diaram below.

I have connected two LEDs (1 and 2) to Pin 3 in such a way that LED1 will glow if Pin 3 acts as a sink (GND) and LED2 will glow if Pin 3 acts as a voltage source. An interesting observation - the output pin can work both as a source and sink! able to source and sink as much as 200 mA of current (quite a bit of current for small to medium scale driver requirements). The above arrangement ensures that LED2 glows when Pin 3 is HIGH (sourcing current) and LED1 glows when Pin 3 is LOW (sinking current).

Now, let's continue building our circuit around Pin 6. Remember that Pin 6 is the threshold pin and it sets the internal SR flip flop if the voltage at Pin 6 exceeds 2*Vcc/3. Since the output of 555 (Pin 3) is derived from the complemented output of the flip-flip, a positive pulse on Pin 6 effectively sets the output at Pin 3 to LOW.

In the circuit above, I have connected Vcc to Pin 6 via a push switch (CLR) and a pull down resistor (R2). Why the pull down resistor? To ensure that when the switch (CLR) is not connected, the voltage at Pin 6 is pulled down to GND via R2.

Let's tackle the last pin (Pin 2). Remember that Pin 2 is the trigger pin (Active Low) - implying that if a negative pulse ( < Vcc/3 ) is applied to this pin, it sets the output (Pin 3 to high) and Pin 3 will continue to remain at high till it is reset either via the Pin 6 or Pin 4. (In our case Pin 6).

In the circuit above, I have connected ground to Pin 2, via push button (SET) and a pull up resistor R1. Why a pull up resistor? - to ensure that Pin 2 receives a HIGH till we activate it via the SET button. Remember again, that a negative pulse is required to activate Pin 2. Pushing the SET button instantaneously grounds the Pin 2, providing a negative pulse.

And so, we have our final circuit. Let's see how it behaves. As the first use case, let's push the SET button (diagram below).

As expected, pushing the SET button, ground the Pin 2, sending a negative pulse and consequently setting the output pin 3. This will in-turn cause the LED2 to glow. Note that LED2 will continue glowing, i.e. Pin 3 will continue to be in a HIGH state even after the SET button is released. Effectively, we have latched an output state by a (negative) trigger pulse at Pin 2.

As the second use case, let's push the CLR button (diagram below).

Again, as expected, pushing the CLR button, provides a HIGH pulse to pin 6, effectively resetting the output state to LOW, in turn causing Pin 3 to sink which in turn causes LED1 to glow. Note that LED2 will switch off when LED1 is glowing. LED1 will continue to glow, i.e. the output Pin 3 will continue in its LOW state till we provide a SET pulse again.

If you have followed it till here, you have pretty much understood 90% of the magic we can accomplish with 555. It all boils down to how we control the inputs at Pin 6 and 2 (optionally by leveraging Pin 7).

The remaining 10% is about playing with Pin 5 to dynamically control the reference voltages of Pin 6 and 2, but we will leave it for now and cover it later in the series. Stay tuned for the next instalment where I will talk about achieving a deterministic state of the output at the instant of powering up the circuit - Power up set/reset.